In this article, I would like to introduce RISC and CISC to you, about what is it, and the difference between RISC and CISC, there is still a video tutorial for you. Let's get started.
A Reduced Instruction Set Computer (RISC) is a microprocessor that executes fewer types of computer instructions, originating from the MIPS mainframe (i.e. RISC machine) in the 1980s. In this way, it could execute operations at a faster rate (millions more instructions per second, or MIPS). Because a computer requires additional transistors and circuit elements to execute each instruction type, a larger computer instruction set makes the microprocessor more complex and executes operations more slowly.
Features of RISC:
Complex Instruction Set Computer (CISC), the CISC instruction set approach has been used since the beginning of computers. The early desktop software was designed according to CISC and has been continued until now. Currently, the popular x86 architecture for desktop computers uses CISC, and microprocessor (CPU) vendors have been following the CISC path, including Intel, AMD, and some other now renamed vendors such as TI (Texas Instruments), IBM, and VIA (VIA).
In CISC microprocessors, each instruction of a program is executed sequentially and serially, and each operation in each instruction is also executed sequentially and serially. The advantage of sequential execution is simple control, but the utilization of the various parts of the computer is not high, and the execution speed is slow. the CISC architecture of the server is mainly IA-32 architecture (Intel Architecture, Intel Architecture), and most of them are used by low-end servers.
Features of CISE:
First of all, it can be understood literally that CISC (Complex InstrucTIon SetComputer) architecture has much more instructions than RISC (ReducedInstrucTIon Set Computer) architecture. In addition, the length of different instruction opcodes is equal in RISC architecture, while the length of different instructions varies greatly in x86.
CISC architecture generally provides general-purpose register a (eax under x86) to support most of the arithmetic instructions, but because the instructions are too complex, not all registers can support all instructions, so there are various mov operations for eax in the assembly code, which affects the performance.
In CISC architecture, different instructions require different clock cycles (for example, multiplication and addition are unlikely to have the same cycle). With the RISC architecture, most instructions can be completed in a single clock cycle, which should reduce the complexity of the instruction pipeline design. The CISC architecture has many complex instructions that are completed by microcode within the CPU, so those instructions with more complex microcode require multiple clock cycles to complete. The different clock cycles required for instruction execution makes it more difficult to optimize the instruction pipeline.
RISC is designed to be a load/store architecture, where only the load and store instructions can access memory, and the data processing instructions only operate on the contents of registers. The CISC architecture allows data processing instructions to operate on memory, so fewer registers are needed. In addition, the X86 architecture supports cpu access to non-aligned memory addresses, which usually causes CPU exceptions in RISC processors. In fact, X86 also implements functions like non-aligned memory address access through microcode within the CPU, which is much less efficient.
Under X86 architecture, IO space and memory space are separate, and IO space is accessed using completely different instructions (in, out). RISC architecture does not distinguish between IO space and memory space, but maps IO space directly to memory space and operates directly with memory space access. The RISC architecture is also streamlined in terms of addressing, with almost all instructions using register addressing.
CISC's instruction-rich advantage allows its compiler to do much less work and makes the compiler design simpler. RISC, on the other hand, requires a bit more instruction entries and larger programs to implement a function.
RISC can make full use of the area of the VLSI chip, most of the controllers of CISC use micro-program control, and its control memory occupies more than 50% of the area of CPU chip, while RISC controller uses combinational logic control, and its hard-wired logic only occupies about 10% of the area of CPU chip.
RISC can improve the speed of operation, the number of instructions, addressing methods and instruction format is less, and there are several general registers, using pipeline technology, so the operation speed is faster, most instructions are completed within a clock cycle.
RISC is easy to design, can reduce cost and improve reliability; RISC instruction system is simple, so the machine design cycle is short; its logic is simple, so the reliability is high.
RISC is good for compiler code optimization; fewer instruction types and fewer addressing methods make it easy for compiler programs to choose more efficient instructions and addressing methods and to adjust the instruction order appropriately to make code execution more efficient.
CISC computers have a richer instruction system with dedicated instructions to perform specific functions. Therefore, it is more efficient to handle special tasks, and RISC designers focus mainly on those frequently used instructions, trying to make them as simple and efficient as possible. The less frequently used functions are often accomplished by combining instructions. Therefore, it is less efficient to implement special functions on RISC machines. However, it can be improved and compensated by using flowing techniques and superscalar techniques.
CISC machines have many memory manipulation instructions and the operation is straightforward. risc has restrictions on memory manipulation to simplify control.
CISC assembly language programs are relatively simple to program, scientific computing and complex operations are relatively easy and efficient to design. risc assembly language programs generally require large memory space and are not easy to design because of the complexity of the program when implementing special functions.
CISC machines respond to interrupts at the end of an instruction's execution. risc machines can respond to interrupts at the appropriate place in the execution of an instruction.
CISC CPU contains rich circuit units and thus is powerful, large in area and power consumption. risc CPU contains fewer unit circuits and thus is small in area and low in power consumption.
CISC microprocessors have a complex structure and long design cycle, while RISC microprocessors have a simple structure, compact layout, short design cycle and easy to adopt the latest technology.
CISC microprocessors are complex, powerful and easy to implement special functions. risc microprocessors are simple in structure, regular in instructions, easy to grasp performance and easy to learn and use.
CISC machines are more suitable for general-purpose machines, while RISC machines are more suitable for specialized machines because the RISC instruction system is determined with respect to a specific application area.
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