XC56156FE60 MOTOROLA Controller

XC56156FE60 Overview

Description

The DSP56100 family of HCMOS, low-power, 16-bit fixed point general-purpose Digital Signal Processors (DSPs) is ideal for high end speech coding, telecommunications, and control applications. The first DSP56100 family member, the DSP56156, combines the high-speed core with 8 K bytes RAM, two serial ports, one parallel port, codec, Phase-Lock Loop (PLL), and an On-Chip Emulation port (OnCE).

The DSP56166, the second member of the DSP56100 family, has identical package and pinout to the DSP56156 with different
memory configuration and peripherals.

Feature

· Up to 30 Million Instructions Per Second(MIPS) at 60MHz;33.3 ns Instruction cycle
· Single-cycle 16× 16-bit parallel Multiply-Accumulate
· 2×40-bit accumulators with extension byte
· Fractional and integer arithmetic with support for multiprecision arithmetic
· Highly parallel instruction set with unique DSP addressing modes
· Nested hardware DO loops, including infinite loops and DO zero loop
· Two instruction LMS adaptive filter loop
· Fast auto-return interrupts
· Three external interrupt request pins
· Three 16-bit internal data and three 16-bit internal address buses
· Individual programmable wait states on the external bus for program, data, and peripheral memory spaces· Off-chip memory-mapped peripheral space with programmable access time and separate peripheral enable pin

·On-chip memory-mapped peripheral registers
·Low power Wait and Stop modes
·OnCE port for unobtrusive,processor speed independent debugging
·Operating frequency down to DC
·5 V single power supply
·Low power(HCMOS)