T1024NSE7KQPA NXP Microprocessors MPU

T1024NSE7KQPA Overview

The QorIQ® dual-core T1024 and T1023 and single-core T1014 and T1013 communications processors combine 64-bit cores, built on Power Architecture® technology, with high-performance Data Path Acceleration Architecture (DPAA) and network peripheral bus interfaces required networking, telecommunications and industrial networked applications. The QorIQ T Series platform offers optimized features for the industrial market, including a display interface unit for HMI, the QUICC Engine® for industrial protocol offload and ECC support for high reliability “always on” applications.

The T1024 and T1014 processors come in a full-featured 23x23 mm package, which provides scalable, pin compatibility with the quad-core T1042 processor, and even the eight core T2081 processor for price and power scaling with a single system design.

The QorIQ T1023 and T1013 communications processors are interface and power-optimized SoCs designed to deliver impressive single- or dual-core performance for cost and power sensitive networking and industrial systems. Both versions offer an excellent software compatible 64-bit and I/O upgrade path for the popular QorIQ P10XX family of 32-bit communications processors.

Features

Single and dual e5500 cores, built on Power Architecture technology
Up to 1.4 GHz with 64-bit ISA support
Three levels of instructions: user, supervisor, hypervisor
Hybrid 32-bit mode to support legacy software and transition to a 64-bit architecture
256 KB backside L2 cache

Networking Elements

SerDes
- Four lanes at up to 10 Gbps
- Supports SGMII, QSGMII, PCIe and SATA
Ethernet Interfaces
- 1x 10GbE and 3x 1GbE or 4x 1Gbe Gigabit Ethernet interfaces, with MACsec on all ports

Accelerators and Memory Control

32/64-bit DDR3L/4 SDRAM memory controller with ECC support
- Up to 1600 MT/s
DPAA incorporating acceleration for the following functions: packet parsing, classification and distribution
- Queue management for scheduling, packet sequencing and congestion management
- Hardware buffer management for buffer allocation and de-allocation
- Integrated security acceleration (SEC)

Basic Peripherals and Interconnect

CoreNet® platform cache
- 256 KB shared platform cache
Hierarchical interconnect fabric
- CoreNet fabric supporting coherent and non-coherent transactions with prioritization and bandwidth allocation amongst CoreNet endpoints
Additional peripheral interfaces one Serial ATA (SATA 2.0) controllers
- Two high-speed USB 2.0 controllers with integrated PHYs
- Enhanced secure digital host controller (SD/MMC/eMMC)
- Enhanced serial peripheral interface (eSPI)
- Two I²C controllers
- Four UARTS
- Integrated flash controller supporting NAND and NOR flash
DMA
- Dual four channel
- Up to 4.1 Gbps Ethernet MACs as part of DPAA
QUICC Engine®
- Support for legacy protocols TDM, HDLC, UART and ISDN
High-speed peripheral interfaces
- Three PCI Express® 2.0 controllers

Additional Features

Support for hardware virtualization and partitioning enforcement
- Extra privileged level for hypervisor support
QorIQ® trust architecture
- Secure boot, secure debug, tamper detection, volatile key storage
This product is included in Our product longevity program, with assured supply for a minimum of 10 years after launch