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Home > Embedded ICs > Embedded - Digital Signal Processors & Controllers (DSP, DSC) > STM32H755ZIT6
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STM32H755ZIT6

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STM32H755ZIT6 Overview

STM32H755xI devices are based on the high-performance Arm® Cortex®-M7 and Cortex®-M4 32-bit RISC cores. The Cortex®-M7 core operates at up to 480 MHz and the Cortex®-M4 core at up to 240 MHz. Both cores feature a floating point unit (FPU) which supports Arm® single- and double-precision (Cortex®-M7 core) operations and conversions (IEEE 754 compliant), including a full set of DSP instructions and a memory protection unit (MPU) to enhance application security.

STM32H755xI devices incorporate high-speed embedded memories with a dual-bank Flash memory of 2 Mbytes, up to 1 Mbyte of RAM (including 192 Kbytes of TCM RAM, up to 864 Kbytes of user SRAM and 4 Kbytes of backup SRAM), as well as an extensive range of enhanced I/Os and peripherals connected to APB buses, AHB buses, 2x32-bit multi-AHB bus matrix and a multi layer AXI interconnect supporting internal and external memory access.
All the devices offer three ADCs, two DACs, two ultra-low power comparators, a low-power RTC, a high-resolution timer, 12 general-purpose 16-bit timers, two PWM timers for motor control, five low-power timers, a true random number generator (RNG), and a cryptographic acceleration cell. The devices support four digital filters for external sigma-delta modulators (DFSDM). They also feature standard and advanced communication interfaces.

ECAD Model

Symbol

STM32H755ZIT6

Footprint

STM32H755ZIT6

Features

  • 32-bit Arm Cortex-M7 core with double-precision FPU and L1 cache: 16 Kbytes of data and 16 Kbytes of instruction cache; frequency up to 480 MHz, MPU, 1027 DMIPS/ 2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
  • 32-bit Arm 32-bit Cortex-M4 core with FPU, Adaptive real-time accelerator (ART Accelerator) for internal Flash memory and external memories, frequency up to 240 MHz, MPU, 300 DMIPS/1.25 DMIPS /MHz (Dhrystone 2.1), and DSP instructions
  • Memories
    • 2 Mbytes of Flash memory with read-while-write support
    • 1 Mbyte of RAM: 192 Kbytes of TCM RAM (inc. 64 Kbytes of ITCM RAM + 128 Kbytes of DTCM RAM for time critical routines), 864 Kbytes of user SRAM, and 4 Kbytes of SRAM in Backup domain
    • Dual mode Quad-SPI memory interface running up to 133 MHz
    • Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND Flash memory clocked up to 125 MHz in Synchronous mode
    • CRC calculation unit
  • Security
    • ROP, PC-ROP, active tamper, secure firmware upgrade support, Secure access mode
  • General-purpose input/outputs
    • Up to 168 I/O ports with interrupt capability
  • Reset and power management
    • 3 separate power domains which can be independently clock-gated or switched off:
      • D1: high-performance capabilities
      • D2: communication peripherals and timers
      • D3: reset/clock control/power management
    • 1.62 to 3.6 V application supply and I/Os
    • POR, PDR, PVD and BOR
    • Dedicated USB power embedding a 3.3 V internal regulator to supply the internal PHYs
    • Embedded regulator (LDO) to supply the digital circuitry
    • High power-efficiency SMPS step-down converter regulator to directly supply VCORE and/or external circuitry
    • Voltage scaling in Run and Stop mode (6 configurable ranges)
    • Backup regulator (~0.9 V)
    • Voltage reference for analog peripheral/VREF+
    • 1.2 to 3.6 V VBAT supply
    • Low-power modes: Sleep, Stop, Standby and VBAT supporting battery charging
  • Low-power consumption
    • VBAT battery operating mode with charging capability
    • CPU and domain power state monitoring pins
    • 2.95 μA in Standby mode (Backup SRAM OFF, RTC/LSE ON)
  • Clock management
    • Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI
    • External oscillators: 4-48 MHz HSE, 32.768 kHz LSE
    • 3× PLLs (1 for the system clock, 2 for kernel clocks) with Fractional mode
  • Interconnect matrix
  • 4 DMA controllers to unload the CPU
    • 1× high-speed master direct memory access controller (MDMA) with linked list support
    • 2× dual-port DMAs with FIFO
    • 1× basic DMA with request router capabilities
  • Applications

    STM32H7

    Specifications

    • Core Processor ARM Cortex M4, Cortex M7

    • Speed 240MHz, 480MHz

    • Operating Temperature -40℃ ~ 85℃ (TA)

    • Program Memory Type FLASH

    • RAM Size 1M x 8

    • Number of I/O 97

    • Peripherals Brown-out Detect/Reset, DMA, I2S, LCD, POR, PWM, WDT

    • Mounting Type Surface Mount

    • Oscillator Type Internal

    • Supplier Device Package 144-LQFP (20x20)

    • Package / Case 144-LQFP

    • Core Size 32-Bit Dual-Core

    • Connectivity CANbus, EBI/EMI, Ethernet, I2C, IrDA, LINbus, MDIO, MMC/SD/SDIO, QSPI, SAI, SPDIF, SPI, SWPMI, UART/USART, USB OTG

    • Program Memory Size 2MB (2M x 8)

    • Data Converters A/D 23x16b; D/A 2x12b

    • Voltage - Supply (Vcc/Vdd) 1.62V ~ 3.6V

    Circuit Diagram

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