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STM32F215RET6TR

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STM32F215RET6TR Overview

The STM32F21x family is based on the high-performance ARM®Cortex?-M3 32-bit RISC core operating at a frequency of up to 120 MHz. The family incorporates high-speed embedded memories (Flash memory up to 1 Mbyte, up to 128 Kbytes of system SRAM), up to 4 Kbytes of backup SRAM, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, three AHB buses and a 32-bit multi-AHB bus matrix.

The devices also feature an adaptive real-time memory accelerator (ART Accelerator?) which allows to achieve a performance equivalent to 0 wait state program execution from Flash memory at a CPU frequency up to 120 MHz. This performance has been validated using the CoreMark benchmark.
All devices offer three 12-bit ADCs, two DACs, a low-power RTC, twelve general-purpose 16-bit timers including two PWM timers for motor control, two general-purpose 32-bit timers. a true number random generator (RNG). They also feature standard and advanced communication interfaces. New advanced peripherals include an SDIO, an enhanced flexible static memory control (FSMC) interface (for devices offered in packages of 100 pins and more), a cryptographic acceleration cell, and a camera interface for CMOS sensors. The devices also feature standard peripherals.

Features

  • Up to 1 Mbyte of Flash memory
  • 512 bytes of OTP memory
  • Up to 128 + 4 Kbytes of SRAM
  • Flexible static memory controller that supports Compact Flash, SRAM, PSRAM, NOR and NAND memories
  • LCD parallel interface, 8080/6800 modes
  • Clock, reset and supply management
    • From 1.8 to 3.6 V application supply+I/Os
    • POR, PDR, PVD and BOR
    • 4 to 26 MHz crystal oscillator
    • Internal 16 MHz factory-trimmed RC
    • 32 kHz oscillator for RTC with calibration
    • Internal 32 kHz RC with calibration
  • Low-power modes
    • Sleep, Stop and Standby modes
    • VBATsupply for RTC, 20 × 32 bit backup registers, and optional 4 KB backup SRAM
  • 3 × 12-bit, 0.5 μs ADCs with up to 24 channels and up to 6 MSPS in triple interleaved mode
  • 2 × 12-bit D/A converters
  • General-purpose DMA: 16-stream controller with centralized FIFOs and burst support
  • Up to 17 timers
    • Up to twelve 16-bit and two 32-bit timers, up to 120 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
  • Applications

    STM32F2

    Specifications

    • Core Processor ARM Cortex M3

    • Speed 120MHz

    • Operating Temperature -40℃ ~ 85℃ (TA)

    • Program Memory Type FLASH

    • RAM Size 132K x 8

    • Number of I/O 51

    • Peripherals Brown-out Detect/Reset, DMA, I2S, LCD, POR, PWM, WDT

    • Mounting Type Surface Mount

    • Oscillator Type Internal

    • Supplier Device Package 64-LQFP (10x10)

    • Package / Case 64-LQFP

    • Core Size 32-Bit

    • Connectivity CANbus, I2C, IrDA, LINbus, MMC, SPI, UART/USART, USB OTG

    • Program Memory Size 512KB (512K x 8)

    • Data Converters A/D 16x12b; D/A 2x12b

    • Voltage - Supply (Vcc/Vdd) 1.8V ~ 3.6V

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