SPC582B50E1CG00X STMicroelectronics 32bit MCU

SPC582B50E1CG00X Overview

The SPC582Bxx microcontroller is the entry member of a new family of devices superseding the SPC582Bx family.

SPC582Bxx is built on the legacy of the SPC5x products, while introducing new features to answer the future requirements like the ASIL-B classification, high number of ISO CAN-FD channels, and provide significant power and performance improvement (MIPS per mW).

Features

32-bit Power Architecture technology CPU
Core frequency as high as 80 MHz
Variable Length Encoding (VLE)
Floating Point, End-to-End Error Correction

1088 KB (1024 KB code flash + 64 KB data flash) on-chip flash memory: supports read during program and erase operations, and multiple blocks allowing EEPROM emulation

96 KB on-chip general-purpose SRAM

Multi-channel direct memory access controller (eDMA) with 16 channels

1 interrupt controller (INTC)

Comprehensive new generation ASIL-B safety concept

ASIL-B of ISO 26262
FCCU for collection and reaction to failure notifications
Memory Error Management Unit (MEMU) for collection and reporting of error events in memories
Cyclic redundancy check (CRC) unit
End-to-end Error Correction Code (e2eECC) logic

Crossbar switch architecture for concurrent access to peripherals, Flash, or RAM from multiple bus masters with end-to-end ECC

Body cross triggering unit (BCTU)

Triggers ADC conversions from any eMIOS channel
Triggers ADC conversions from up to 2 dedicated PIT_RTIs
1 event configuration register dedicated to each timer event allows to define the corresponding ADC channel
Synchronization with ADC to avoid collision