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Home > Embedded ICs > Embedded - Microprocessor Unit (MPU) > MPC860TZQ50D4R2
NXP

MPC860TZQ50D4R2

MPC860TZQ50D4R2

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MPC860TZQ50D4R2 Overview

The MPC860 PowerQUICC® offers an integrated processor and peripheral solution that can be used in a variety of communications and networking controller applications.

  • Delivers higher performance in all areas of device operation including flexibility, extensions in capability, and integration
  • Provides lower power consumption than traditional architectures
  • Backed by strong third-party tool support through Our Design Alliance Program

Features

  • 4Kb Instruction Cache; MPC860P - 16Kb Instruction Cache
  • 4Kb Data Cache; MPC860P - 8Kb Data Cache
  • 8Kb Dual Port RAM
  • Instruction and Data MMUs
  • Up to 32-Bit Data Bus (Dynamic Bus Sizing for 8,16, and 32 Bits)
  • 32 Address Lines
  • Complete Static Design (040 MHz Operation)
  • Memory Controller (Eight Banks)
  • General-Purpose Timers
  • System Integration Unit (SIU)
  • Interrupts
  • Communications Processor Module (CPM)
  • Four Baud Rate Generators
  • Four SCCs (Serial Communication Controllers)
  • Two SMCs (Serial Management Channels)
  • One SPI (Serial Peripheral Interface)
  • One I2C (Inter-Integrated Circuit) Port
  • Time-Slot Assigner
  • Parallel Interface Port
  • PCMCIA Interface
  • Low Power Support
  • Debug Interface
  • 3.3 V Operation with 5V TTL Compatibility

Applications

MPC8xx

Specifications

  • Core Processor MPC8xx

  • Speed 50MHz

  • Operating Temperature 0℃ ~ 95℃ (TA)

  • Package / Case 357-BBGA

  • Number of Cores/Bus Width 1 Core, 32-Bit

  • Ethernet 10Mbps (4), 10/100Mbps (1)

  • RAM Controllers DRAM

  • Voltage - I/O 3.3V

  • Graphics Acceleration No

  • Supplier Device Package 357-PBGA (25x25)

  • Co-Processors/DSP Communications; CPM

Circuit Diagram

MPC860

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