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Home > Embedded ICs > Embedded - Microprocessor Unit (MPU) > MPC850DEVR50BUR2
NXP

MPC850DEVR50BUR2

MPC850DEVR50BUR2

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MPC850DEVR50BUR2 Overview

The MPC850 PowerQUICC® processor offers a versatile, integrated, low-cost solution for variety of controller, networking, and communications applications.

  • Includes extensive communications and system integration support
  • Simplifies development and accelerates time-to-market
  • Offloads core tasks for increased performance and efficiency
  • Backed by strong third-party tool support through Our Design Alliance Program

Features

  • 2-Kbyte Instruction Cache
  • 1-Kbyte Data Cache
  • Instruction and Data MMUs
  • Up to 32-Bit Data Bus (Dynamic Bus Sizing for 8,16, and 32 Bits)
  • 26 External Address Lines
  • Complete Static Design (0-66 MHz Operation)
  • Memory Controller (Eight Banks)
  • General-Purpose Timers
  • System Integration Unit (SIU)
  • Interrupts
  • Communications Processor Module (CPM)
  • Four Baud Rate Generators
  • Up to two SCCs (Serial Communication Controller with Ethernet Support)
  • One USB Port
  • Two SMCs (Serial Management Channels)
  • One SPI (Serial Peripheral Interface)
  • One I2C (Inter-Integrated Circuit) Port
  • Time-Slot Assigner
  • Parallel I/O Ports (supports UTOPIA)
  • PCMCIA Interface
  • Low Power Support
  • Debug Interface
  • 3.3 V Operation
  • 3.3 V System Bus Operation
  • 256-Pin Ball Grid Array (BGA)

Applications

MPC8xx

Specifications

  • Core Processor MPC8xx

  • Speed 50MHz

  • Operating Temperature 0℃ ~ 95℃ (TA)

  • Package / Case 256-BBGA

  • USB USB 1.x (1)

  • Number of Cores/Bus Width 1 Core, 32-Bit

  • Ethernet 10Mbps (1)

  • RAM Controllers DRAM

  • Voltage - I/O 3.3V

  • Graphics Acceleration No

  • Supplier Device Package 256-PBGA (23x23)

  • Co-Processors/DSP Communications; CPM

Circuit Diagram

MPC850

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