HD6413003TF16V RENESAS Controller

HD6413003TF16V Overview

Description
Memory
RAM: 512 bytes
Interrupt controller
• Nine external interrupt pins: NMI, IRQ0 to IRQ7
• 34 internal interrupts
• Three selectable interrupt priority levels
Bus controller
• Address space can be partitioned into eight areas, with independent
bus specifications in each area
• Chip select output available for each area
• 8-bit access or 16-bit access selectable for each area
• Two-state or three-state access selectable for each area
• Selection of four wait modes
• Bus arbitration function
Refresh controller
• Directly connectable to 16-bit-wide DRAM
• CAS-before-RAS refresh
• Self-refresh mode selectable
Pseudo-static RAM refresh
• Self-refresh mode selectable
Usable as an interval timer
DMA controller
Short address mode
• Maximum four channels available
• Selection of normal mode or block transfer mode
• Can be activated by compare match/input capture A interrupts from ITU channels 0 to 3, SCI transmit-data-empty and receive- data-full interrupts, or external requests
Full address mode
• Maximum four channels available
• Selection of normal mode or block transfer mode
• Can be activated by compare match/input capture A interrupts from
ITU channels 0 to 3, external requests, or auto-request

Circuit Diagram

HD6413003TF16V

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HD6413003TF16V Overview

Circuit Diagram

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