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NXP

DSP56F805FV80

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DSP56F805FV80 Overview

The 56F805, a member of the 56800 core-based family of Digital Signal Controllers, combines the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals on a single chip. This creates an extremely cost-effective solution for servo and motor control, power inverter, and converter applications.

 

The 56800 core is based on a Harvard-style architecture consisting of three execution units which operate in parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming model and optimized instruction set allow straightforward generation of efficient, compact code for both DSP-and MCU-style applications. The instruction set is also highly efficient for C compilers, enabling rapid development of optimized control applications.

Features

  • Advanced Pulse Width Modulation
  • Dual Analog to Digital Converters
  • Programmable 16-bit timers
  • 8MHz Oscillator and PLL with integrated pre- and post-scalers
  • On-board power conversion and management
  • NXP® Scalable CAN Module
  • Serial communications interface module (SCI)
  • Serial peripheral interface module (SPI)
  • GPIO
  • JTAG/OnCE Debug Programming Interface

 

Applications

56F8xx

Specifications

  • Core Processor 56800

  • Speed 80MHz

  • Operating Temperature -40℃ ~ 85℃ (TA)

  • Program Memory Type FLASH

  • RAM Size 2K x 16

  • Number of I/O 32

  • Peripherals POR, PWM, WDT

  • Mounting Type Surface Mount

  • Oscillator Type External

  • Supplier Device Package 144-LQFP (20x20)

  • Package / Case 144-LQFP

  • Core Size 16-Bit

  • Connectivity CANbus, EBI/EMI, SCI, SPI

  • Program Memory Size 64KB (32K x 16)

  • Data Converters A/D 8x12b

  • Voltage - Supply (Vcc/Vdd) 3V ~ 3.6V

Circuit Diagram

DSP56F805

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