1024x8 Dual-Port Static Random-Access Memories
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The Am2130 and the Am2140 are members of the 1Kx8 dual-port static RAM family. The Am2130 is designated as the master and the Am2140 as the slave device. The master provides the necessary control signal to the slave devices to facilitate implementing a wider data bus in a system. The master/slave concept allows expansion with minimal external logic.
Both devices have two independent ports called Left and Right port. Each port consists of an 8-bit bidirectional data bus and a 10-bit address input bus and necessary control signals.The Am2130 has an on-board arbiter to resolve contentionbetween the left and right ports.
When contention between ports occurs, one port is given priority while the other port receives a busy indication.The Am2130 also contains on-chip facilities for supporting semaphores. Addresses (3FE)H and (3FF)H serve as interrupt generators. If any data is written at the address(3FF)H from the left port, an interrupt signal becomes active for the right port. The interrupt signal is deactivated by reading from the right port at the same address. The address(3FE)H is used in a similar fashion by the right port to activate the interrupt signal for the left port. The Am2130/Am2140 also have two chip enable signals corresponding to the left and right ports.
Before any transaction on a port takes place, the corresponding chip enable input must be activated. If a chip enable signal is not active, the circuitry corresponding to its side automatically powers down and enters standby mode.The Am2130/Am2140 are packaged in 48-pin DIPs or 52-pin plastic leaded chip carrier. All inputs and outputs are TTL-compatible and the devices operate from a single +5-volt power supply.
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