ADAU1466WBCPZ300 Analog Devices 32bit DSP

ADAU1466WBCPZ300 Overview

The ADAU1462/ADAU1466 are automotive qualified audio processors that far exceed the digital signal processing capabilities of earlier SigmaDSP® devices. They are pin and register compatible with each other, as well as with the ADAU1450/ADAU1451/ADAU1452 SigmaDSP processors. The restructured hardware architecture is optimized for efficient audio processing. The audio processing algorithms support a seamless combination of stream processing (sample by sample), multirate processing, and block processing paradigms. The SigmaStudio™ graphical programming tool enables the creation of signal processing flows that are interactive, intuitive, and powerful. The enhanced digital signal processor (DSP) core architecture enables some types of audio processing algorithms to be executed using significantly fewer instructions than were required on previous SigmaDSP generations, leading to vastly improved code efficiency.

The 1.2 V, 32-bit DSP core can run at frequencies of up to 294.912 MHz and execute up to 6144 SIMD instructions per sample at the standard sample rate of 48 kHz. Powerful clock generator hardware, including a flexible phase-locked loop (PLL) with multiple fractional integer outputs, supports all industry standard audio sample rates. Nonstandard rates over a wide range can generate up to 15 sample rates simultaneously. These clock generators, along with the on board asynchronous sample rate converters (ASRCs) and a flexible hardware audio routing matrix, make the ADAU1462/ADAU1466 ideal audio hubs that greatly simplify the design of complex multirate audio systems.

The ADAU1462/ADAU1466 interface with a wide range of analog-to-digital converters (ADCs), digital-to-analog converters (DACs), digital audio devices, amplifiers, and control circuitry with highly configurable serial ports, I2C, serial peripheral interface (SPI), Sony/Philips Digital Interconnect Format (S/PDIF) interfaces, and multipurpose input/output (I/O) pins. Dedicated decimation filters can decode the pulse code modulation (PDM) output of up to four MEMS microphones.

Independent slave and master I2C/SPI control ports allow the ADAU1462/ADAU1466 to be programmed and controlled by an external master device such as a microcontroller, and to program and control slave peripherals directly. Self boot functionality and the master control port enable complex standalone systems.

The power efficient DSP core can execute at high computational loads while consuming only a few hundred milliwatts (mW) in typical conditions. This relatively low power consumption and small footprint make the ADAU1462/ADAU1466 ideal replacements for large, general-purpose DSPs that consume more power at the same processing load.

Applications

Automotive audio processing
- Head units
- Distributed processors
- Rear seat entertainment systems
- Trunk amplifiers
Commercial and professional audio processing

ECAD Model

Footprint

Features

Qualified for automotive applications
High performance SigmaDSP core enables low latency and audio applications
- Active Noise Cancellation (ANC)
- Echo-Canceller and Noise Reduction (ECNR)
- Surround sound algorithms
Features SigmaStudio, a proprietary graphical Integrated Development Environment (IDE), for the development of custom signal flows
- Comprehensiveof pre-defined building blocks
- Faster design time with proven solutions
- Intuitive system design
294.912 MHz, 32-bit SigmaDSP core at 1.2 V
- 24 kWords of program memory
- 80 kWords of parameter/data RAM
- 6144 SIMD instructions per sample at 48 kHz
- 1600 ms digital audio delay pool at 48 kHz
Audio I/O and routing
- 4 serial input ports, 4 serial output ports
- 48-channel, 32-bit digital I/O up to a sample rate of 192 kHz
- Flexible configuration of I2S, left and right justified, and up to 16-channel TDM formats on serial data pins
- 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and 139 dB dynamic range
- Stereo S/PDIF input and output at 192 kHz
- Four PDM microphone input channels
- Multichannel, byte addressable TDM serial ports
Clock oscillator for generating master clock from crystal
Integer PLL and flexible clock generators
Integrated die temperature sensor
I2C and SPI control interfaces (both slave and master)
Standalone operation
- Self-boot from serial EEPROM
- 6-channel, 10-bit SAR auxiliary control ADC
- 14 multipurpose pins for digital controls and outputs
On-chip regulator for generating 1.2 V from 1.8 V to 3.3 V supply
72-lead, 10 mm × 10 mm LFCSP package with 5.3 mm exposed pad
Temperature range: −40°C to +105°C