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Xilinx

Xilinx Inc.

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies, from the endpoint to the edge to the cloud. Specializing in programmable logic devices, Xilinx is the semiconductor company that invented the Field Programmable Gate Array (FPGA), the hardware programmable System on Chip (SoC), and the Adaptive Compute Acceleration Platform (ACAP).

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    XCF08PVOG48C

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    XCF32PVOG48C

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    XCF32PFS48C

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    XCCACE-TQ144I

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    XCF16PVOG48C

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    XC18V01VQG44C

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    XC5VSX35T-2FFG665I

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    XC17V01VO8I

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    XC18V04VQ44I

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    XC18V01VQ44I

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    XC17S20PD8I

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    Package/Case : 8-DIP (300 MIL)

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  • XCF128XFTG64C
    XCF128XFTG64C

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    XC17V02VQ44C

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Related News

Xilinx launches Zynq® RFSoC DFE, realizing the best 5G NR wireless technology
Xilinx launches Zynq® RFSoC DFE, realizing the best 5G NR wireless technology

Xilinx announced the launch of Zynq® RFSoC DFE, a new type of breakthrough adaptive radio platform designed to meet the evolving 5G NR wireless application standards. Zynq RFSoC DFE combines hardened digital front-end (DFE) modules with flexible programmable logic to create a high-performance, low-power, and cost-effective 5G NR radio solution ... [Details]

2020-10-29 15:28

Xilinx helps ON Semiconductor's smart power module platform to be faster and more efficient
Xilinx helps ON Semiconductor's smart power module platform to be faster and more efficient

ON Semiconductor’s intelligent power modules (IPM) and integrated power modules are manufactured for effective motor control. They are suitable for high voltage and high operating temperature, and reduce the space of the drive. Higher switching frequency helps improve efficiency and exceeds the capabilities of traditional motor control soluti... [Details]

2020-11-23 11:45

Xilinx KU Series Triple Speed Ethernet IP Core RGMII Timing Constraint
Xilinx KU Series Triple Speed Ethernet IP Core RGMII Timing Constraint

1. Overview   Based on the RGMII timing widely used in Ethernet communication, the Xilinx-based 3-speed Ethernet timing analysis is different for different Xilinx series methods. When more than 2-way Ethernet communication is used, the MAC core of KU series FPGAs needs to be modified to support 2-way Ethernet and meet the timing requirements. ... [Details]

2024-03-05 12:24

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