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Hisilicon Hi3518EV200 Introduction

Date: 29-03-2021 ClickCount: 1415

1. Introduction

Hi3518EV200 is a new generation of HD IP camera SOC, HI3518E V200 is the ARM9 core CPU, integrated 64M DDR and a variety of internal peripherals to form the SOC, external expansion of 8M spi flash and a variety of external peripherals to form the HI3518EV200.

The integration of a new generation of ISP, optimized pre-encoding image processing algorithm and a new generation of H.264 encoder, while using advanced low-power process and low-power architecture design, making the Hi3518EV200 in low bit rate, high image quality, low power consumption has superior performance.

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2. system block diagram

Hi3518EV200

3. Main features

Support 8/10/12/14bit RGB Bayer input, clock up to 100MHz

Support 4-channel MIPI/Hispi/LVDS interface

H.264 encoding can support maximum resolution of 2M Pixel

Encoding frame rate support 1/16~30fps

Embedded 512M*16bit DDR2 (up to 360MHz)

Support 3D noise reduction, image enhancement, edge enhancement

Support video output anti-flicker processing

Support 3A function (user-adjustable)

Strong light suppression, backlight compensation, gamma, color enhancement

Support bad point correction, digital anti-shake

Support defogging function

Support lens distortion correction

Support PC side ISP tuning tools

Typical power consumption 700mW

4. Typical applications

Hi3518EV200

Previous Use of STM32F3 op-amps - STM32F303 Discovery board as an example
STM32 microcontroller must master the 8 IO port mode and pin configuration
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