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Home > Embedded ICs > Embedded - Microcontroller Unit (MCU) > SN74LV165ARGYR
Texas Instruments

SN74LV165ARGYR

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SN74LV165ARGYR Overview

The ’LV165A devices are parallel-load, 8-bit shift registers designed for 2-V to 5.5-V VCC operation.

When the devices are clocked, data is shifted toward the serial output QH. Parallel-in access to each stage is provided by eight individual direct data inputs that are enabled by a low level at the shift/load (SH/LD is held low, independently of the levels of CLK, CLK INH, or SER.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

Features

  • 2-V to 5.5-V VCC Operation
  • Max tpd of 10.5 ns at 5 V
  • Support Mixed-Mode Voltage Operation on All Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
Description

The ’LV165A devices are parallel-load, 8-bit shift registers designed for 2-V to 5.5-V VCC operation.

When the devices are clocked, data is shifted toward the serial output QH. Parallel-in access to each stage is provided by eight individual direct data inputs that are enabled by a low level at the shift/load (SH/LD is held low, independently of the levels of CLK, CLK INH, or SER.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

Specifications

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