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Home > Embedded ICs > Embedded - Digital Signal Processors & Controllers (DSP, DSC) > CS48L10-ENZ
Cirrus Logic

CS48L10-ENZ

CS48L10-ENZ

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CS48L10-ENZ Overview

The CS48L10 ultra low power voice and audio DSP chip has been designed to bring best-in-class audio processing capability to mobile/portable applications, while having minimum impact on overall system power consumption. The CS48L10 provides designers with the opportunity to enhance, improve, and differentiate their products, while simultaneously reducing the audio-processing burden from the main system processor. Support for home audio applications is through a third party. Please contact your local sales representative for information.

Features

  • Up to 120-MHz single-core Cirrus Logic 32-bit DSP
    • Advanced Harvard architecture with separate X, Y, and P memory space
    • Fixed-point DSP core can perform 2 multiply-andaccumulate (MAC) operations (32 x 32) per clock cycle
    • Eight 72-bit accumulators
    • 20 K words of 32-bit X-data RAM
    • 24 K words of 32-bit Y-data RAM
    • 20 K words of 32-bit P-code RAM
    • 40 K x 32 total ROM
  • Ultralow power consumption: 0.1 mW/MHz (typical code, core supply only)
  • On-chip 8-channel DMA
  • Configurable serial audio inputs/outputs
    • Master or slave mode for digital audio inputs (DAI) (up to 6-ch I²S or 8-ch TDM)
    • Master or slave mode for digital audio output (DAO) (up to 6-ch I²S or 8-ch TDM)
    • Supports Fs sample rates of 8, 12, 16, 24, 32, 44.1, 48, 96, and 192 KHz
  • I²C™ or SPI™ serial interface port
    • Master or slave operation
  • Integrated clock manager/PLL
    • Flexibility to operate from internal PLL or external oscillator
  • Internal programmable interrupt controller (PIC)
  • Timers and watchdog
  • Configurable GPIOS
  • 1.0–1.2 V for core and memory; 1.8–3.3 V for I/O
  • Integrated, high-efficiency power management reduces power consumption
    • X, Y and P memory partitioned into 4K blocks (8K blocks for P ROM)
    • Each memory block has independent power down control
    • DSP core clock scaling and voltage scaling
    • Low power modes for DSP core

Applications

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Specifications

  • Clock Rate 80MHz

  • Operating Temperature -40℃ ~ 105℃ (TA)

  • Type Fixed Point

  • Non-Volatile Memory ROM (160 kB)

  • Voltage - Core 1.00V

  • Voltage - I/O 1.8V, 3.3V

  • Interface I2C, SPI

  • On-Chip RAM 256kB

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