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ADSP-21363KBC-1AA

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ADSP-21363KBC-1AA Overview

The third generation of SHARC® Processors, which includes the ADSP-21261, ADSP-21262, ADSP-21266, ADSP-21363, ADSP-21364, ADSP-21365, and ADSP-21366 offers increased performance, audio and application-focused peripherals, and memory configurations capable of supporting surround-sound decoder algorithms. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These members of the SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats making them particularly suitable for high-performance audio applications.

The ADSP-21363 offers the highest performance – 333 MHz/2 GFLOPs -- within the third generation SHARC Processor family. This level of performance makes the ADSP-21363 particularly well suited to address the increasing requirements of many general purpose signal processing applications.

Third generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Audio Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include, but are not limited to, serial ports, SPI ports and an 8-Channel asynchronous sample rate converter block.

Features

  • 333 MHz SIMD SHARC Core, capable of 2 GFLOPS peak performance
  • 3Mbits SRAM ; 4Mbits customer-definable ROM
  • 25 zero-overhead DMA channels
  • Digital Audio Interface (DAI) enabling user-definable access to peripherals including 8-channel asynchronous sample rate converter.
  • 16 Pulse Width Modulation (PWM) channels
  • 6 serial ports (SPORTs) supporting I2S, left-justified sample pair, and TDM modes
  • 2 SPI-compatible ports supporting master and slave modes
  • 3 full-featured timers
  • 136-ball MBGA and 144-Ld LQFP E-Padpackage options
  • Commercial and industrial temperature ranges

Applications

SHARC?

Specifications

  • Clock Rate 333MHz

  • Operating Temperature 0℃ ~ 70℃ (TA)

  • Type Floating Point

  • Non-Volatile Memory ROM (512 kB)

  • Package / Case 136-LFBGA, CSPBGA

  • Voltage - Core 1.20V

  • Voltage - I/O 3.30V

  • Mounting Type Surface Mount

  • Interface DAI, SPI

  • Supplier Device Package 136-CSPBGA (12x12)

  • On-Chip RAM 384kB

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