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Home > Embedded ICs > Network Controller & Processor ICs > PEF22554HTV2.1
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PEF22554HTV2.1

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PEF22554HTV2.1 Overview

This document describes the changes implemented in the QuadFALC® Version 2.1 related to the previous version 1.3. All functions not mentioned in this document remain unchanged. 

QuadFALC® Version 2.1 is a pin-compatible replacement of QuadFALC® Version 1.x. Severe errata of QuadFALC® Version 1.3 are fixed.

Features

The following function has been changed: 

• Version status in register VSTR changed from 02H to 05H 

• The boundary scan part number changed to 142, the boundary scan ID changed to 1. A new BSDL file is required. 

• The pulse mask programming (registers XPM(2:0)) has to be adjusted. 

• The MCLK reference clock programming (registers GCM(8:1)) has to be changed. 

• Variable master clock frequency function always enabled (GCM2(4) = 1). 

• New feature “automatic short haul/long haul adjustment” available by setting LIM0.EQON = 1. 

• Additional automatic resynchronization mode for T1 (new bit: FMR2.7 = AFRS). 

• Additional compare status field (mode 2) in SS7 mode (new bit: CCR5.6 = CSF2). 

• 2048 kHz synchronization interface according o ITU-T G.703 Sec. 13 (E1).

Specifications

  • Mounting Style SMD/SMT

  • Data Rate 2.048 Mbps

  • Package / Case TQFP-144

  • Packaging Tray

  • Product Framer

  • Supply Voltage - Max 2.4 V, 4.5 V

  • Number of Transceivers 4

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